v 20130925 2 C 33500 51200 1 0 0 ax5043.sym { T 37400 55300 5 10 1 1 0 6 1 refdes=U2 T 35250 53600 5 10 0 0 0 0 1 device=ax5043 T 33500 51200 5 10 0 0 0 0 1 footprint=QFN28_5_EP } C 33300 54100 1 270 0 gnd-1.sym C 33300 52900 1 270 0 gnd-1.sym C 33400 56000 1 270 0 capacitor-1.sym { T 34100 55800 5 10 0 0 270 0 1 device=CAPACITOR T 33700 55300 5 10 1 1 270 0 1 refdes=C7 T 34300 55800 5 10 0 0 270 0 1 symversion=0.1 T 33500 55000 5 10 1 1 90 0 1 footprint=0402 T 33800 55600 5 10 1 1 90 0 1 value=100n } N 33600 54300 33600 55100 4 C 33300 56100 1 270 0 gnd-1.sym C 34300 57300 1 90 0 tcxo3225.sym { T 32800 58700 5 10 1 1 90 6 1 refdes=U1 T 33200 57800 5 10 0 0 90 0 1 device=tcxo3225 T 34300 57300 5 10 0 0 0 0 1 footprint=tcxo3225 } C 34200 56000 1 0 0 resistor-1.sym { T 34500 56400 5 10 0 0 0 0 1 device=RESISTOR T 34200 56200 5 10 1 1 0 0 1 refdes=R2 T 34400 55900 5 10 1 1 0 0 1 footprint=0402 T 34700 56200 5 10 1 1 0 0 1 value=1k } N 34200 55500 34200 56500 4 N 34200 55500 34800 55500 4 N 35100 55500 35100 56500 4 C 34000 57400 1 270 0 capacitor-1.sym { T 34700 57200 5 10 0 0 270 0 1 device=CAPACITOR T 34300 56700 5 10 1 1 270 0 1 refdes=C4 T 34900 57200 5 10 0 0 270 0 1 symversion=0.1 T 34100 56400 5 10 1 1 90 0 1 footprint=0402 T 34400 57000 5 10 1 1 90 0 1 value=1n } N 34200 58100 34200 57400 4 C 32500 57800 1 0 0 gnd-1.sym C 34900 57400 1 270 0 capacitor-1.sym { T 35600 57200 5 10 0 0 270 0 1 device=CAPACITOR T 35200 56700 5 10 1 1 270 0 1 refdes=C8 T 35800 57200 5 10 0 0 270 0 1 symversion=0.1 T 35000 56400 5 10 1 1 90 0 1 footprint=0402 T 35300 57000 5 10 1 1 90 0 1 value=1n } C 35200 57700 1 180 0 gnd-1.sym C 34800 49700 1 0 0 inductor-1.sym { T 35000 50200 5 10 0 0 0 0 1 device=INDUCTOR T 35000 50000 5 10 1 1 0 0 1 refdes=L3 T 35000 50400 5 10 0 0 0 0 1 symversion=0.1 T 35000 49600 5 10 1 1 0 0 1 footprint=1206 } N 35100 51300 35100 50200 4 N 35100 50200 34800 50200 4 N 34800 50200 34800 49800 4 N 35400 51300 35400 50200 4 N 35400 50200 35700 50200 4 N 35700 50200 35700 49800 4 C 35000 58400 1 90 0 capacitor-1.sym { T 34300 58600 5 10 0 0 90 0 1 device=CAPACITOR T 34700 59100 5 10 1 1 90 0 1 refdes=C1 T 34100 58600 5 10 0 0 90 0 1 symversion=0.1 T 34900 59400 5 10 1 1 270 0 1 footprint=0603 T 34600 58800 5 10 1 1 270 0 1 value=2.2u } C 34900 59600 1 180 0 gnd-1.sym C 36200 58500 1 180 0 resistor-1.sym { T 35900 58100 5 10 0 0 180 0 1 device=RESISTOR T 36200 58300 5 10 1 1 180 0 1 refdes=R1 T 36000 58600 5 10 1 1 180 0 1 footprint=0805 T 35700 58300 5 10 1 1 180 0 1 value=10 } N 36300 55500 36300 58400 4 C 37200 56400 1 180 0 capacitor-1.sym { T 37000 55700 5 10 0 0 180 0 1 device=CAPACITOR T 36500 56100 5 10 1 1 180 0 1 refdes=C9 T 37000 55500 5 10 0 0 180 0 1 symversion=0.1 T 36200 56300 5 10 1 1 0 0 1 footprint=0402 T 36800 56000 5 10 1 1 0 0 1 value=100n } C 37500 56100 1 90 0 gnd-1.sym N 37700 53700 39100 53700 4 N 37700 53100 40000 53100 4 N 37700 52800 40200 52800 4 N 37700 52500 39800 52500 4 N 36600 51300 39400 51300 4 N 36300 51000 40800 51000 4 N 36300 51000 36300 51300 4 N 36000 51300 36000 50700 4 N 36000 50700 40300 50700 4 N 35700 51300 35700 50400 4 N 35700 50400 41300 50400 4 N 35300 58400 34200 58400 4 N 36300 58400 36200 58400 4 N 35700 55500 35700 56600 4 N 35700 56600 35900 56600 4 N 35900 56600 35900 59000 4 N 35400 55500 35400 56800 4 N 35400 56800 35700 56800 4 N 35700 56800 35700 59000 4 N 38400 54300 37700 54300 4 N 37700 54000 38400 54000 4 N 36300 57300 39500 57300 4 C 31500 53200 1 0 0 capacitor-1.sym { T 31700 53900 5 10 0 0 0 0 1 device=CAPACITOR T 32200 53500 5 10 1 1 0 0 1 refdes=C6 T 31700 54100 5 10 0 0 0 0 1 symversion=0.1 T 32500 53300 5 10 1 1 180 0 1 footprint=0603 T 31900 53600 5 10 1 1 180 0 1 value=3p } T 31500 54800 9 10 1 0 90 0 1 tline T 32300 54200 9 10 1 0 90 0 1 tline N 33600 53400 32400 53400 4 N 33600 53700 32700 53700 4 N 32700 53700 32700 55200 4 N 32700 55200 31500 55200 4 N 31500 53400 31500 55200 4 N 32400 53400 32400 55000 4 C 32100 55100 1 270 0 gnd-1.sym N 31500 53400 30800 53400 4 N 30800 53400 30800 54400 4 N 30800 54400 29600 54400 4 N 30600 53100 32100 53100 4 C 31200 52200 1 90 0 capacitor-1.sym { T 30500 52400 5 10 0 0 90 0 1 device=CAPACITOR T 30900 52900 5 10 1 1 90 0 1 refdes=C3 T 30300 52400 5 10 0 0 90 0 1 symversion=0.1 T 31100 52500 5 10 1 1 270 0 1 footprint=0603 T 30800 52500 5 10 1 1 270 0 1 value=3p } C 31800 52200 1 90 0 capacitor-1.sym { T 31100 52400 5 10 0 0 90 0 1 device=CAPACITOR T 31500 52900 5 10 1 1 90 0 1 refdes=C5 T 30900 52400 5 10 0 0 90 0 1 symversion=0.1 T 31700 52500 5 10 1 1 270 0 1 footprint=0603 T 31400 52500 5 10 1 1 270 0 1 value=3p } C 30900 51900 1 0 0 gnd-1.sym C 31500 51900 1 0 0 gnd-1.sym C 30300 52200 1 90 0 capacitor-1.sym { T 29600 52400 5 10 0 0 90 0 1 device=CAPACITOR T 30000 52800 5 10 1 1 90 0 1 refdes=C2 T 29400 52400 5 10 0 0 90 0 1 symversion=0.1 T 30200 52500 5 10 1 1 270 0 1 footprint=0603 T 29900 52500 5 10 1 1 270 0 1 value=3p } C 30000 51900 1 0 0 gnd-1.sym N 33600 53100 32900 53100 4 N 32900 53100 32900 52000 4 N 32900 52000 32600 52000 4 N 32600 52000 32600 53100 4 N 32600 53100 32400 53100 4 N 32400 53100 32400 52000 4 N 32400 52000 32100 52000 4 N 32100 52000 32100 53100 4 N 30400 50800 30400 53100 4 N 30400 50800 30600 50800 4 N 30600 53100 30600 50800 4 N 29600 53100 30400 53100 4 N 32200 58400 32600 58400 4 C 33400 51800 1 270 0 capacitor-1.sym { T 34100 51600 5 10 0 0 270 0 1 device=CAPACITOR T 33700 51100 5 10 1 1 270 0 1 refdes=C10 T 34300 51600 5 10 0 0 270 0 1 symversion=0.1 T 33500 50800 5 10 1 1 90 0 1 footprint=0402 T 33800 51400 5 10 1 1 90 0 1 value=100n } C 33500 50600 1 0 0 gnd-1.sym N 33600 51800 33600 52500 4 C 29800 51100 1 90 0 inductor-1.sym { T 29300 51300 5 10 0 0 90 0 1 device=INDUCTOR T 29600 51200 5 10 1 1 90 0 1 refdes=L2 T 29100 51300 5 10 0 0 90 0 1 symversion=0.1 T 29600 51600 5 10 1 1 90 0 1 value=100n T 29900 51300 5 10 1 1 90 0 1 footprint=1206 } C 29600 50800 1 0 0 gnd-1.sym C 30200 54400 1 90 0 inductor-1.sym { T 29700 54600 5 10 0 0 90 0 1 device=INDUCTOR T 30000 54500 5 10 1 1 90 0 1 refdes=L1 T 29500 54600 5 10 0 0 90 0 1 symversion=0.1 T 30000 54900 5 10 1 1 90 0 1 value=100n T 30300 54500 5 10 1 1 90 0 1 footprint=1206 } C 30200 55600 1 180 0 gnd-1.sym N 29700 52000 29700 53100 4 C 35600 59900 1 270 0 terminal-1.sym { T 36350 59590 5 10 0 0 270 0 1 device=terminal T 36200 59590 5 10 0 0 270 0 1 footprint=custom_pad1 T 35650 59650 5 10 1 1 270 6 1 refdes=T17 } C 35800 59900 1 270 0 terminal-1.sym { T 36550 59590 5 10 0 0 270 0 1 device=terminal T 36400 59590 5 10 0 0 270 0 1 footprint=custom_pad1 T 35850 59650 5 10 1 1 270 6 1 refdes=T18 } C 38000 57300 1 270 0 capacitor-1.sym { T 38700 57100 5 10 0 0 270 0 1 device=CAPACITOR T 38300 56600 5 10 1 1 270 0 1 refdes=C11 T 38900 57100 5 10 0 0 270 0 1 symversion=0.1 T 38100 56300 5 10 1 1 90 0 1 footprint=0805 T 38400 56900 5 10 1 1 90 0 1 value=10u } C 38100 56100 1 0 0 gnd-1.sym C 28700 54300 1 0 0 terminal-1.sym { T 29010 55050 5 10 0 0 0 0 1 device=terminal T 29010 54900 5 10 0 0 0 0 1 footprint=custom_pad1 T 28950 54350 5 10 1 1 0 6 1 refdes=T22 } C 28700 53000 1 0 0 terminal-1.sym { T 29010 53750 5 10 0 0 0 0 1 device=terminal T 29010 53600 5 10 0 0 0 0 1 footprint=custom_pad1 T 28950 53050 5 10 1 1 0 6 1 refdes=T23 } N 39100 53700 39100 52600 4 N 39100 52600 40600 52600 4 C 41700 55500 1 270 0 stm32f103c8_lqfp48.sym { T 47300 50100 5 10 1 1 270 6 1 refdes=U? T 44850 53000 5 10 0 0 270 0 1 device=STM32F103C8 } N 39400 51300 39400 53900 4 N 39400 53900 41800 53900 4 N 39800 52500 39800 53600 4 N 39800 53600 41800 53600 4 N 40200 52800 40200 53300 4 N 40200 53300 41800 53300 4 N 40000 53100 40000 53000 4 N 40000 53000 41800 53000 4 N 40600 52600 40600 52400 4 N 40600 52400 41800 52400 4 N 45100 55400 45100 55900 4 N 40800 55900 45100 55900 4 N 40800 55900 40800 51000 4 N 41800 51800 40300 51800 4 N 40300 51800 40300 50700 4 N 41300 50400 41300 52700 4 N 41300 52700 41800 52700 4 N 32200 58400 32200 60300 4 N 32200 60300 41100 60300 4 N 41100 49400 41100 60300 4 C 44300 55700 1 180 0 gnd-1.sym C 41500 51300 1 270 0 gnd-1.sym C 45900 49500 1 0 0 gnd-1.sym C 47800 53800 1 90 0 gnd-1.sym N 43900 50900 43900 55400 4 N 43900 54200 47500 54200 4 N 41800 50900 46300 50900 4 N 46300 49800 46300 50900 4 N 46300 55400 46300 54200 4 C 45400 56600 1 180 0 capacitor-1.sym { T 45200 55900 5 10 0 0 180 0 1 device=CAPACITOR T 44700 56300 5 10 1 1 180 0 1 refdes=C9 T 45200 55700 5 10 0 0 180 0 1 symversion=0.1 T 44400 56500 5 10 1 1 0 0 1 footprint=0402 T 45000 56200 5 10 1 1 0 0 1 value=100n } N 44500 55400 44500 56400 4 C 45700 56300 1 90 0 gnd-1.sym C 42900 49500 1 180 0 resistor-1.sym { T 42600 49100 5 10 0 0 180 0 1 device=RESISTOR T 42900 49300 5 10 1 1 180 0 1 refdes=R2 T 42700 49600 5 10 1 1 180 0 1 footprint=0402 T 42400 49300 5 10 1 1 180 0 1 value=1k } C 41800 49100 1 270 0 capacitor-1.sym { T 42500 48900 5 10 0 0 270 0 1 device=CAPACITOR T 42100 48400 5 10 1 1 270 0 1 refdes=C9 T 42700 48900 5 10 0 0 270 0 1 symversion=0.1 T 41900 48100 5 10 1 1 90 0 1 footprint=0402 T 42200 48700 5 10 1 1 90 0 1 value=100n } N 43000 49800 43000 49400 4 N 43000 49400 42900 49400 4 N 42000 49100 42000 49400 4 C 41900 47900 1 0 0 gnd-1.sym N 42000 49400 41100 49400 4