v 20130925 2 C 42900 47000 1 0 0 lm1875.sym { T 43600 47800 5 10 0 0 0 0 1 device=lm1875 T 43600 47600 5 10 1 1 0 0 1 refdes=U1 T 43600 48400 5 10 0 0 0 0 1 symversion=0.1 } C 43300 46700 1 0 0 gnd-1.sym C 43000 46000 1 0 0 resistor-1.sym { T 43300 46400 5 10 0 0 0 0 1 device=RESISTOR T 43200 46300 5 10 1 1 0 0 1 refdes=R6 T 43200 45800 5 10 1 1 0 0 1 value=100k T 43200 45600 5 10 1 1 0 0 1 footprint=0603 } C 41000 47400 1 0 0 capacitor-1.sym { T 41200 48100 5 10 0 0 0 0 1 device=CAPACITOR T 41200 47900 5 10 1 1 0 0 1 refdes=C2 T 41200 48300 5 10 0 0 0 0 1 symversion=0.1 T 41400 47200 5 10 1 1 0 0 1 value=4.7u } C 41900 46000 1 0 0 resistor-1.sym { T 42200 46400 5 10 0 0 0 0 1 device=RESISTOR T 42100 46300 5 10 1 1 0 0 1 refdes=R5 T 42300 45800 5 10 1 1 0 0 1 value=10k T 42300 45600 5 10 1 1 0 0 1 footprint=0603 } C 41700 46100 1 270 0 capacitor-1.sym { T 42400 45900 5 10 0 0 270 0 1 device=CAPACITOR T 42200 45900 5 10 1 1 270 0 1 refdes=C4 T 42600 45900 5 10 0 0 270 0 1 symversion=0.1 T 41700 46100 5 10 1 1 180 0 1 value=100u } C 41800 44900 1 0 0 gnd-1.sym N 42800 46100 43000 46100 4 N 42900 46100 42900 47200 4 N 43900 46100 43900 47400 4 C 44800 46500 1 90 0 resistor-1.sym { T 44400 46800 5 10 0 0 90 0 1 device=RESISTOR T 44500 46700 5 10 1 1 90 0 1 refdes=R7 T 44900 47000 5 10 1 1 0 0 1 value=1 T 44900 46700 5 10 1 1 0 0 1 footprint=0805 } C 44900 45600 1 90 0 capacitor-1.sym { T 44200 45800 5 10 0 0 90 0 1 device=CAPACITOR T 44400 45800 5 10 1 1 90 0 1 refdes=C6 T 44000 45800 5 10 0 0 90 0 1 symversion=0.1 T 45000 46000 5 10 1 1 0 0 1 value=0.1u T 45000 45700 5 10 1 1 0 0 1 footprint=0603 } C 44600 45300 1 0 0 gnd-1.sym N 43900 47400 45600 47400 4 C 42900 49000 1 270 0 capacitor-1.sym { T 43600 48800 5 10 0 0 270 0 1 device=CAPACITOR T 43400 48800 5 10 1 1 270 0 1 refdes=C3 T 43800 48800 5 10 0 0 270 0 1 symversion=0.1 T 43600 48400 5 10 1 1 180 0 1 value=4700u } C 44800 49000 1 270 0 capacitor-1.sym { T 45500 48800 5 10 0 0 270 0 1 device=CAPACITOR T 45300 48800 5 10 1 1 270 0 1 refdes=C5 T 45700 48800 5 10 0 0 270 0 1 symversion=0.1 T 45500 48500 5 10 1 1 180 0 1 value=4.7u } C 43000 47800 1 0 0 gnd-1.sym C 44900 47800 1 0 0 gnd-1.sym N 44500 49000 46500 49000 4 C 42200 48900 1 0 0 resistor-1.sym { T 42500 49300 5 10 0 0 0 0 1 device=RESISTOR T 42400 49200 5 10 1 1 0 0 1 refdes=R2 T 42500 48700 5 10 1 1 0 0 1 value=22k T 42500 48500 5 10 1 1 0 0 1 footprint=0603 } C 41300 48900 1 0 0 resistor-1.sym { T 41600 49300 5 10 0 0 0 0 1 device=RESISTOR T 41500 49200 5 10 1 1 0 0 1 refdes=R1 T 41500 48700 5 10 1 1 0 0 1 value=22k T 41400 48500 5 10 1 1 0 0 1 footprint=0603 } C 41200 48700 1 0 0 gnd-1.sym C 42200 50000 1 180 0 capacitor-1.sym { T 42000 49300 5 10 0 0 180 0 1 device=CAPACITOR T 41700 49600 5 10 1 1 180 0 1 refdes=C1 T 42000 49100 5 10 0 0 180 0 1 symversion=0.1 T 41800 49500 5 10 1 1 0 0 1 value=100u } N 41300 49000 41300 50400 4 N 42200 49000 42200 50400 4 C 42300 48100 1 90 0 resistor-1.sym { T 41900 48400 5 10 0 0 90 0 1 device=RESISTOR T 42000 48300 5 10 1 1 90 0 1 refdes=R3 T 42300 48200 5 10 1 1 0 0 1 value=22k T 42300 48000 5 10 1 1 0 0 1 footprint=0603 } N 41900 47600 42900 47600 4 N 42200 48100 42200 47600 4 C 41100 46700 1 90 0 resistor-1.sym { T 40700 47000 5 10 0 0 90 0 1 device=RESISTOR T 40800 46900 5 10 1 1 90 0 1 refdes=R4 T 41100 47100 5 10 1 1 0 0 1 value=1k T 41100 46900 5 10 1 1 0 0 1 footprint=0603 } C 40900 46400 1 0 0 gnd-1.sym C 46500 47600 1 180 0 capacitor-1.sym { T 46300 46900 5 10 0 0 180 0 1 device=CAPACITOR T 46300 47100 5 10 1 1 180 0 1 refdes=C7 T 46300 46700 5 10 0 0 180 0 1 symversion=0.1 T 46100 47600 5 10 1 1 0 0 1 value=4.7u } C 46500 46800 1 180 0 capacitor-1.sym { T 46300 46100 5 10 0 0 180 0 1 device=CAPACITOR T 46300 46300 5 10 1 1 180 0 1 refdes=C8 T 46300 45900 5 10 0 0 180 0 1 symversion=0.1 T 46000 45900 5 10 1 1 0 0 1 value=4700u } N 45600 46600 45600 47400 4 N 46500 46600 46500 47400 4 C 47400 47500 1 180 0 terminal-1.sym { T 47090 46750 5 10 0 0 180 0 1 device=terminal T 47090 46900 5 10 0 0 180 0 1 footprint=CONNECTOR 1 1 T 47150 47450 5 10 1 1 180 6 1 refdes=T3 } C 43700 49700 1 90 0 inductor-1.sym { T 43200 49900 5 10 0 0 90 0 1 device=INDUCTOR T 43400 49900 5 10 1 1 90 0 1 refdes=L1 T 43000 49900 5 10 0 0 90 0 1 symversion=0.1 } C 43500 51700 1 270 0 terminal-1.sym { T 44250 51390 5 10 0 0 270 0 1 device=terminal T 44100 51390 5 10 0 0 270 0 1 footprint=CONNECTOR 1 1 T 43550 51450 5 10 1 1 270 6 1 refdes=T2 } C 39300 47500 1 0 0 terminal-1.sym { T 39610 48250 5 10 0 0 0 0 1 device=terminal T 39610 48100 5 10 0 0 0 0 1 footprint=CONNECTOR 1 1 T 39550 47550 5 10 1 1 0 6 1 refdes=T1 } N 40200 47600 41000 47600 4 C 46000 47800 1 0 0 gnd-1.sym C 42200 50600 1 180 0 capacitor-1.sym { T 42000 49900 5 10 0 0 180 0 1 device=CAPACITOR T 41600 50800 5 10 1 1 180 0 1 refdes=C10 T 42000 49700 5 10 0 0 180 0 1 symversion=0.1 T 42000 50600 5 10 1 1 90 0 1 value=0.1u } N 43400 47800 44700 47800 4 N 44700 47800 44700 49000 4 C 44500 49100 1 180 0 resistor-1.sym { T 44200 48700 5 10 0 0 180 0 1 device=RESISTOR T 44200 48700 5 10 1 1 180 0 1 refdes=R8 T 44000 49200 5 10 1 1 90 0 1 value=0 } N 43600 49000 43100 49000 4 C 43300 49000 1 90 0 capacitor-1.sym { T 42600 49200 5 10 0 0 90 0 1 device=CAPACITOR T 42800 49200 5 10 1 1 90 0 1 refdes=C9 T 42400 49200 5 10 0 0 90 0 1 symversion=0.1 T 43300 49200 5 10 1 1 0 0 1 value=0.1u } C 43200 50200 1 180 0 gnd-1.sym N 43600 50600 43600 50800 4 N 43600 49700 43600 49000 4